| Radiocommunications Agency
|Circuit design for emissions control|
What this technique is used for
The design of analogue, digital, or switch-mode power conversion circuits, and the choice of components for those circuits, can make a very big difference to the EMC emissions performance of a product.
Good circuit design to reduce emissions can also help to improve immunity.
How this technique is used
From the very first – circuits are designed and the components for them chosen using a number of well-proven EMC principles.
It is not anything like as cost-effective (or time-saving) if the circuit design and component choice EMC techniques are applied later on, when EMC problems have been found and solutions are being sought.
Key issues in employing this technique
Keeping dV/dt and dI/dt as low as possible
A Fourier (frequency domain) analysis of a waveform shows that the higher the rate of change of voltage or current – the higher in frequency its spectrum extends. Since all conductors are ‘unintentional antennas’, reducing the amount of RF energy in them at higher frequencies by reducing the dV/dt and dI/dt they experience, helps to reduce conducted and radiated emissions.
So it helps to use signals whose rates-of-change are no faster than they need to be for the functioning of the circuit. Unfortunately, due to the very small sizes of the transistors in modern ICs, rates of change are often very much faster than they need to be – causing emissions problems.
Reducing the total RF energy that is emitted
Digital and switch-mode signals emit a burst of emissions at their clock’s fundamental frequency and its harmonics every time they change state. There is only a small amount of energy in one of these bursts, but these circuits run at a high frequency so there are very many bursts per second.
The more of these little bursts of RF emissions there are per second, the higher is the overall level of emissions from the circuit and its attached conductors. So it helps to use clock frequencies that are no higher than needed. Unfortunately, the whole trend in electronics is to operate at higher frequencies so as to use smaller components or to process more data in a given time.
There are a number of techniques which can be applied to digital circuits to keep their dV/dt and dI/dt as low as possible, without affecting a circuit’s operation. The first aim is to use ICs that have operational frequencies and edge-rates (rise and fall times) that are no faster than they need to be. But this is not always possible, so the next aim is to filter the driver outputs so that the frequencies they put into the various conductors (PCB traces, cables, etc.) are no higher than are needed.
Matched transmission line techniques will need to be used when the rise-time (or fall-time) of a signal is less than one-half of the propagation delay from the driver to its furthest load. For example, applying this rule to an IC with an output specification of 2ns rise/falltime might imply that transmission line techniques are only required for its PCB traces or other conductors that exceed 130mm in length.
But in real life, the IC’s rise/fall output times can be a lot less than its data sheet specifications (typically between one-eighth and one-half) and the capacitive loading of the input gates of a multi-drop bus will reduce the propagation velocity of the PCB traces. The result is that when the 2ns (specified) IC is driving a multi-drop bus it may need to use transmission lines for all traces which are longer than 40mm.
Note that the ‘half risetime’ rule given above is only a very rough guide. Good practice uses a quarter-risetime (or one-eighth risetime) rule.
Transmission lines with higher characteristic impedance will have lower emissions.
IC manufacturers are constantly seeking to make the transistors in their ICs smaller, and they will sometimes ‘mask shrink’ (or ‘die shrink’) an existing digital IC product so as to achieve higher yields and improve profitability.
Although the functions of the IC remain the same, the rates of change of its internal and I/O signals (their edge-rates) can become significantly faster, making a previously EMC-compliant product non-compliant. This has cost some manufacturers millions of pounds in re-engineering existing products, so it is best to be aware of this possibility and take appropriate steps to reduce the risks.
Other digital circuit techniques include…
Use good power supply decoupling at RF frequencies, for all the power pins on all digital ICs.
Use drivers with output current ratings no more powerful than they need to be.
Connect unused gates’ inputs to an appropriate power rail to prevent spurious oscillations.
RF-bonding processor heatsinks to the PCB’s 0V plane.
Use asynchronous processing or spread-spectrum clocking where practicable.
Analogue circuits that operate at d.c. and audio frequencies often emit no significant RF energy at all, although audio power amplifiers can emit significant levels of conducted and radiated energy at audio frequencies so they may be able to interfere with other d.c. or audio circuits. An audio amplifier that is ‘clipping’ has a discontinuous waveform rich in energy at RF frequencies can cause significant levels of RF emissions.
Analogue circuits that are unstable can oscillate quite powerfully at RF. This is one reason for not using opamps which have a higher gain-bandwidth product (GBW) than is necessary. It is not unusual for an opamp with a GBW of 4MHz to self-oscillate with some combination of feedback circuit and loading, at frequencies as high as 40MHz (which the 4MHz GBW specification would lead one to think was impossible).
There are a number of circuit techniques which should be applied to feedback circuits to make them stable regardless of temperature and load variations. Very fast opamps have been available for many years, and they also need to use RF techniques in their circuit design and PCB layout, to ensure stability and freedom from spurious oscillations.
RF circuits often use local oscillators, and these can require careful design to minimise their content of spurious and harmonic frequencies, and to reduce their emissions.
Power supply and switch-mode circuits
The main issue here is keeping dV/dt and dI/dt as low as possible, without affecting a circuit’s operation. An ordinary mains rectifier connected to a d.c. storage capacitor has discontinuous current waveforms which can cause a product to fail a conducted emissions test – usually easily solved with small-value capacitors across each rectifier’s terminals.
But it is switch-mode power conversion circuits that cause big problems for emissions. It is probably true to say that no off-line (mains input) switch-mode power converter ever passes an EMC test without at least a mains filter and a great deal of attention to EMC detail. A great many low-voltage DC-DC converters can also have emissions problems.
Switch-mode power converters are used in almost all modern off-line power supplies (AC-DC converters) and DC-DC converters, and they are also used in uninterruptible power supplies and variable speed induction motor drives.
Keeping dV/dt and dI/dt as low as possible employs the following techniques:
Resonant and quasi-resonant circuit topology
Zero voltage and/or zero-current switching topology
‘Snubbing’ of the flyback from inductive loads
Careful choice of fast-switching rectifiers (prefer ones that are soft-switching as well as fast)
Suppression of CM noise injection due to transformers
RF bonding of heatsinks
Spread spectrum clocking
As well as keeping dV/dt and dI/dt as low as possible, communications circuits should employ the following EMC techniques…
Use matched transmission line techniques where appropriate
Employ RF filtering
Use balanced signalling (sometimes called differential)
Use signal processing protocols to stop dominant frequencies appearing in the data stream